Synopsys and Intel Foundry deepen collaboration covering EDA flows and IP portfolio

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Synopsys has announced that its AI-driven digital and analogue design flows are certified by Intel Foundry for the Intel 18A process.

In addition, through integration of Synopsys Foundation IP and Interface IP tuned for Intel Foundry technology, mutual customers will be able to design and deliver differentiated chips using advanced Intel Foundry technologies.

With its certified EDA flows, multi-die system solution, and comprehensive IP portfolio in development for the Intel 18A process, Synopsys will provide support for designers in terms of accelerating the development of advanced high-performance designs.

"The era of pervasive intelligence is driving significant silicon proliferation in the semiconductor industry, requiring strong ecosystem collaboration to help ensure customer success," said Shankar Krishnamoorthy, GM of the Synopsys EDA Group. "The AI-driven certified flows combined with the development of a broad Synopsys IP portfolio on the Intel 18A process, marks a significant milestone in our collaboration with Intel to help our mutual customers bring to life innovative devices, whether on the smallest processes or at angstrom scale."

"Our longstanding, strategic collaboration with Synopsys provides designers with access to industry-leading certified EDA flows and IP that deliver the best performance, power, and area for the Intel 18A technology," added Rahul Goyal, Vice President and General Manager, Product and Design Ecosystem, Intel Foundry.

Synopsys is currently working closely with Intel Foundry to enhance its EDA digital and analogue design flows to accelerate both the quality of results and time to results, while optimising Synopsys IP and EDA flows for power and area on the Intel 18A process to take advantage of Intel's PowerVIA backside routing and RibbonFET transistors.

The Intel 18A process technology is optimised using Synopsys design technology co-optimisation tools and, in addition, Synopsys Analog QuickStart Kit (QSK) and Synopsys Custom Compiler process design kit (PDK) for Intel 18A can deliver proven methodologies for higher quality design and fast turnaround times.

Intel Foundry customers can integrate a comprehensive Synopsys IP portfolio built for Intel advanced process technologies and Synopsys will enable a range of its industry-leading interface and foundation IP to accelerate design execution and time to market for SoCs.

Synopsys and Intel Foundry said that they are also driving multi-die systems forward with Synopsys 3DIC Compiler platform and Intel's advanced foundry processes.

The platform addresses Intel Foundry chip designers' most complex multi-die system needs and provides automated routing for UCIe interfaces, while allowing seamless co-design of Intel's EMIB packaging technology. The Synopsys Multi-Die System Solution enables early architecture exploration, rapid software development and system validation, efficient die and package co-design, robust and secure die-to-die connectivity, and enhanced manufacturing and reliability.