Fraunhofer IESE partners with Arteris to develop AI/ML applications

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Arteris, a provider of system IP, and Fraunhofer IESE have partnered to enable interoperability between Arteris' FlexNoC and Ncore network-on-chip (NoC) development environment and Fraunhofer IESE's DRAM subsystem design space exploration framework.

According to Arteris, this interoperability will improve performance, reduce cost and accelerate the schedule of advanced DRAM-centric NoC development for shared customers.

"Early, accurate modelling of the characteristics of the latest DRAM architectures is a critical component to arrive at optimal power-optimised SoC architectures," said Professor Dr. Matthias Jung, an expert in virtual engineering at Fraunhofer IESE. "By enabling interoperability and integration between Arteris' FlexNoC and Ncore with DRAMSys4.0, our customers can understand the impact of advanced DRAM technology on NoC performance and power consumption at the earliest project stages, avoiding surprises leading to architecture redesigns later in the project cycle."

DRAM performance is critical when it comes to advanced AI/ML architectures due to requirements on efficiency of data movement, computation, AI model complexity, real-time inference and energy consumption.

While models of memory controllers impact memory access mapping, command generation and timing control, memory organisation, configuration and error correction, memory models also manage data storage, access, retrieval, refresh and retention.

DRAMSys consists of models that reflect the DRAM functionality, power, and temperature and allows system designers to analyse any limiting parameters and issues concerning current DRAM standards in the context of system and NoC architectures.

The interoperability between Arteris and Fraunhofer IESE technology will help designers to complete a thorough performance analysis in the context of DRAM architectures before committing to a NoC architecture.

"Generative AI SoCs have memory-centric architectures. The performance and flexibility of Arteris interconnect IP products support ultra-high bandwidth traffic to feed data to advanced memory architectures supported by the Fraunhofer IESE memory exploration framework," said Frank Schirrmeister, vice president solutions and business development at Arteris. "Together, we can enable our customers to reduce cost and schedules for their highly differentiated and performance-optimised NoC architectures."

The integration of Arteris and Fraunhofer offerings is now available.