The LPDDR5/4x/4 combo PHY IP, which is capable of data rates of up to 6400 Mbps, provides improved configurability, and reliability for high-speed memory interfaces in SSD controllers, with significant power, performance, and area (PPA) advantages.
It has been able to achieve significant area savings and demonstrated improved levels of efficiency. Moreover, the firmware-based PHY independent training through an embedded processor optimises the boot-time memory training for the highest data reliability and margin at the system level.
“Our experience with OPENEDGES’ team has enabled seamless silicon bring-up, which can be quite complicated,” said Daniel Kim, CEO of Novachips. “The released SoC has met and even exceeded our expectations, reaching our required maximum data rates with only half the footprint of other solutions, and we are now looking forward to mass production within a short time. This combination LPDDR5/4x/4 IP solution support all required features of the LPDDR specifications, enabling our team to achieve the necessary functionality and flexibility in our SoC.”
Novachips is an innovator in flash storage processors and storage modules.
The LPDDR5/4x/4 PHY IP at 12nm was designed to meet the requirements of high-speed memory interfaces with quad-rank support in SSD controllers, offering high performance.
“I am proud of how our Applications Engineering and Design teams have closely collaborated with Novachips to bring-up this combo PHY in a variety of configurations,” said Ron Choi, Senior Manager of Applications Engineering at The Six Semiconductor (TSS) of OPENEDGES. “We have successfully proven full-speed PHY operation on Novachips’ LPDDR5, LPDDR4x, and LPDDR4 platforms, and look forward to continued partnership as they fully validate their memory subsystems.”
