It doubles the bandwidth of current systems based on 56G while enabling the deployment of 112G I/Os in a variety of new applications.
According to Marvell, the 112G 5nm SerDes offers breakthrough performance with the ability to operate at 112G PAM4 across channels with >40dB insertion loss, providing margin that is critical for high reliability infrastructure applications.
The solution also delivers a power reduction of more than 25% compared to 7nm, enabling systems with tight thermal/power constraints and helping to drive down total cost of ownership. The power reduction of Marvell's high-speed SerDes enables scale up of bandwidth within acutely constrained 5G applications.
Marvell is looking to offer a complete product suite of PHYs, switches, data processor units (DPUs), custom server processors, controllers, accelerators and custom ASICs in 5nm, delivering end-to-end interoperable infrastructure solutions.
“Our new 112G 5nm SerDes solution, with its industry-leading power, performance and area metrics is a true game changer and will help scale data infrastructure to meet growing interconnect requirements,” said Sandeep Bharathi, senior vice president of Central Engineering at Marvell. “System performance is typically limited by bandwidth and power in most infrastructure applications, and our new 112G solution in 5nm addresses this by doubling the bandwidth, while reducing the overall I/O power.”