Marvell and TSMC collaborate on 5nm technology

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Marvell, a provider of data infrastructure semiconductor solutions, is extending its long term partnership with TSMC to deliver a comprehensive silicon portfolio for the data infrastructure market leveraging 5nm process technology.

With this collaboration, Marvell and TSMC will advance the essential technology underpinning next-generation infrastructure to provide the storage, bandwidth, speed, and intelligence that these new systems require, together with significant improvements to energy efficiency. Built in partnership with TSMC on the most advanced process technology currently in volume production, Marvell's new 5nm portfolio will enable leading-edge silicon innovation for the infrastructure market.

Marvell's 5nm portfolio will provide the essential high-performance compute, networking and security technology required to advance infrastructure development for end-market applications. Marvell's Ethernet connectivity solutions enable high-performance, low-power network connectivity, optimised for applications that span cloud data centres to the harsh environment of the automotive market.

The company's OCTEON platform is the industry's leading Arm-based high-performance compute architecture for embedded infrastructure applications targeting a wide variety of wired and wireless networking equipment including switches, routers, secure gateways, firewalls, and network monitoring solutions. OCTEON is the world's most widely deployed data processing unit (DPU) for data-centre scale computing and enables acceleration and offload capabilities, including Smart NICs and security accelerators. It also features optimised and customised 5G processing and baseband capabilities.

With multiple designs already under contract for its 5nm portfolio, Marvell is developing solutions across the carrier, enterprise, automotive, and data centre markets with first products sampling by the end of next year. This marks a significant milestone for the infrastructure industry as the process node cadence now closely follows that of the consumer and high-performance market.

Behind Marvell's entire 5nm solution set is its IP portfolio that covers the full spectrum of infrastructure requirements including high-speed SerDes up to 112Gbps long-reach, processor subsystems, encryption engines, system-on-chip fabrics, chip-to-chip interconnects, and a variety of physical layer interfaces. These technologies are all in development now on TSMC's N5P process, an enhanced version of TSMC's 5nm technology which delivers approximately 20 percent faster speed or 40 percent power reduction compared to the previous 7nm generation.

"We are proud to partner with Marvell to serve the data infrastructure market with cutting-edge silicon, and are committed to supporting their growing needs in development, quality, supply and capacity," said Dr. Kevin Zhang, Senior Vice President of Business Development at TSMC. "In the 5G era, more applications than ever are demanding the most advanced silicon technology we can provide. We look forward to collaborating with Marvell to meet these demands with our combined design and process expertise and extend our long history of partnership to the 5nm generation and beyond."

Raghib Hussain, Chief Strategy Officer and Executive Vice President of the Networking and Processors Group at Marvell added, "TSMC's 5nm process provides world-class power, performance and gate density – and it's critical for the demands of the leading companies in the world in cloud, 5G, enterprise, and automotive."