This next generation solution extends the mixed-signal verification capabilities of Siemens’ Symphony platform to support new and advanced Accellera standardised verification methodologies with a comprehensive and intuitive visual debug cockpit, which according to Siemens, results in productivity improvements of up to 10X compared to legacy solutions.
Next-generation applications are driving strong demand for greater analogue and mixed-signal content in next-generation SoCs and mixed-signal circuits are increasingly ubiquitous. For these advanced applications, mixed-signal circuits enable lower power, area, and cost while delivering ever-improving performance figures.
“Mixed-Signal functional verification is increasingly vital for our sophisticated designs targeted for the imaging and automotive industries. We've participated in the early access programme for Symphony Pro and have seen significant productivity gains thanks to advanced debugging capabilities and seamless support for multi-layer sandwich configurations in Symphony Pro,” said Stephane Vivien, senior CAD manager, Imaging Division, STMicroelectronics.
Increased application of digital control, digital calibration, and digital signal processing techniques in modern mixed-signal chip architectures is driving a shift in mixed-signal verification methodologies toward more digital-centric approaches.
Siemens’s Symphony Pro platform extends the rapid deployment of industry-standard Universal Verification Methodology (UVM) and Unified Power Format (UPF) driven low-power techniques into the mixed signal domain by offering fast simulation performance in a unified environment for exceptional throughput and capacity.
Modern mixed-signal SoCs integrate analogue circuits with logic gates operating at very high clock speeds. This high frequency bi-directional signal flow at the boundary of analogue and digital pushes the limit of manual debug methodologies impacting the overall time-to-results. Symphony Pro Visualizer MS environment offers a seamless debug experience across the entire mixed-signal design hierarchy providing comprehensive analysis, automation, and ease-of-use for increased productivity.
“Our customers are rapidly advancing the state-of-the-art in mixed-signal SoC design across a wide range of applications, and in the process, they are driving the requirements for new innovations in the EDA tools required to design, verify, and validate these chips,” said Ravi Subramanian, senior vice president of IC Verification at Siemens Digital Industries Software.