Able to offer a new level of highly accurate image recognition for vision AI applications the new device, equipped with two 64-bit Arm Cortex-A53 cores, can deliver high computing performance with a maximum operating frequency of 1GHz. The RZ/V2MA features a proprietary low power DRP-AI (Dynamically Reconfigurable Processor) accelerator which can process vision AI at 1 TOPS/W (tera operations per second, per watt) class performance.
The RZ/V2MA offers high-speed interfaces such as Ethernet, USB, and PCI Express that allow image input from multiple external cameras. In addition to the DRP-AI accelerator, the RZ/V2MA includes an OpenCV accelerator that allows rule-based image processing simultaneously. These features bring highly accurate image recognition capabilities for machine vision products such as AI-equipped gateways, video servers, security gates, POS terminals and robotic arms.
Renesas is also offering a full suite of development tools to aid vision AI system design. In addition to the existing DRP-AI Translator, the new device adds DRP-AI TVM, which is based on the open-source deep learning compiler Apache TVM technology.
While DRP AI Translator is designed to convert AI models into DRP-AI executables, the DRP-AI TVM compiler lets the DRP-AI accelerator work together with the CPU, allowing DRP-AI to convert and generate more AI models. As a first phase, Renesas supports ONNX and PyTorch AI models and plans to support Tensorflow in the future.
"One of the challenges for embedded systems developers who want to implement machine learning is to keep up with the latest AI models that are constantly evolving,” said Shigeki Kato, Vice President of Renesas' Enterprise Infrastructure Business Division. “With the DRP-AI TVM tool, we are offering designers the option to expand AI frameworks and AI models that can be converted to executable formats, allowing them to bring the latest image recognition capabilities to embedded devices using new AI models.”
