Belgian research institute imec is working with Tokyo Electron (TEL) and Canon Anelva to develop next generation spin transfer torque magnetoresistive ram (STT-MRAM).
The collaboration is aimed at exploring the full technology potential of STT-MRAM, including performance beyond 1ns and scalability beyond 10nm for embedded and standalone applications. Research will be performed on Canon Anelva's deposition tool, which has been installed at imec's state of the art 300mm clean room. TEL's Tactras etch tool has also been installed at the facility to help develop the patterning processes for high density STT-MRAM technology. The tool is designed for in-situ cluster patterning of the magnetic tunnel junction (MTJ) stack, which is key for advanced memory technology nodes. "We are very pleased to co develop with Canon Anelva the processes for scaling STT-MRAM technology, a promising alternative high density memory technology for the existing memory technologies such as sram and dram," said Luc Van den hove, imec's ceo. "The first lab tests on Canon's MTJs confirm the joint ambition to significantly move forward with scaling STT-MRAM devices, bringing this technology closer to industrial viability."