The Power Block is essentially a non-isolated buck converter without the PWM controller. It provides a single package solution that incorporates all of the power handling components, fully tested and characterised for thermal and dynamic performance.
The Power Block design approach is intended to allow the power engineer to achieve the highest efficiency and maximum possible power & current density while maintaining a high performance system at a lower cost when compared to a complete module design approach. Most analogue or digital PWM controllers can be used with the Power Block. Reference designs are available using Texas Instrument's TPS40425 (2-Phase, Stackable PMBUS Synchronous Buck Controller).
The OKLP-X60-W12A-C provides a regulated 0.6 – 3.63 VDC output of up to 60 A from a 7 – 13.2 VDC input and is suited to use in point-of-load (PoL) applications. Energy efficiency, rated at 12 Vin and 3.3 Vout, is typically 95% and with its compact dimensions of 25.4 x 12.7 x 12.2 mm a power density of up to 481 Watts per cubic inch can be achieved.
The OKLP-X/60-W12A-C is suitable for powering FPGAs, ASICs, microprocessors and providing I/O voltages in Intermediate Bus Architecture applications.
