Synopsys unveils breakthrough in emulation performance

1 min read

Synopsys has announced a number of new innovations in emulation delivering 10 MHz performance to speed hardware and software verification of complex system-on-chips (SoCs) in areas such as HPC, 5G, GPU, artificial intelligence (AI) and automotive.

The ZeBu EP1 emulation system leverages Synopsys' direct-connect architecture to optimise design communication and to deliver a significantly improved emulation performance.

In addition, the power-aware emulation, system-level debug, hybrid emulation and virtual host and device capabilities in the ZeBu are able to accelerate SoC product readiness across both hardware and software domains.

"We continue to accelerate innovation for our verification hardware by collaborating with industry-leading customers," said Manoj Gandhi, general manager of the Verification Group at Synopsys. "ZeBu EP1 represents the convergence of multiple hardware and software technologies to deliver breakthrough performance and debug. The unique fast emulation capability in ZeBu is enabling electronics companies to develop and verify the most advanced SoCs with full software stacks."

Part of the Synopsys Verification Continuum Platform, ZeBu supports a comprehensive range of use cases. Recent ZeBu innovations include:

  • ZeBu Empower emulation system, the first SoC power-aware emulation system, enabling multiple iterations per day with actionable power profiling in the context of the full design and its software workload.
  • ZeBu System Level Debug can efficiently debug complex SoC with billion-cycle software workloads, leveraging high-bandwidth host interface for continuous data streaming and deterministic replay for eliminating redundant emulation runs.
  • ZeBu Hybrid Emulation with Virtualizer virtual prototyping, supported by an extensive library of virtual processor, memory and interface models, delivers 70-100x throughput gain for OS boot enabling more complex software validation and earlier tape-out.
  • ZeBu Virtual Host and Device models for PCIe 5.0, USB3, SATA, Ethernet, and NVMe enable validation of host to device software stack with real OS, driver, and application software of complex SoCs.
  • ZeBu Simulation Acceleration technology with unified testbench and design compile, and speed optimized protocol transactors provides 100x speed up for simulation for faster RTL regression performance and environment bring up.
  • ZeBu Speed Adapters connect ZeBu emulation systems to real-world environments for in-circuit emulation (ICE) use cases. Based on proven Synopsys DesignWare IP, they support PCIe, CXL 2.0, Ethernet, USB, SATA, Display port as well as 5G testers, networking testers and customer specific hardware.