New Lattice MachXO2ZE FPGA options

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Lattice Semiconductor has announced new versions of the Lattice MachXO2ZE FPGA family with wafer level chip-scale packaging (WLCSP) and increased I/O density.

With package sizes as small as 2.5 x 2.5mm, standby power levels as low as 22 μW, and up to 63 general-purpose I/Os (GPIO), the MachXO2ZE FPGAs are intended for signal bridging and/or interface applications in smart consumer and industrial IoT devices operating at the network Edge.

"Most Edge computing applications require sensor data to enable their users’ connected experiences, be it a microphone in a smart speaker capturing a voice command or a hand-held RFID scanner scanning a barcode in a warehouse,” said Peiju Chiang, Product Marketing Manager at Lattice. “Devices like these often have unique form factors or operate on batteries, so the device’s internal components must be as small and power-efficient as possible. Our MachXO2ZE devices can connect a range of sensors and other peripherals commonly used in Edge devices with minimal impact on power and overall device size.”

These Lattice MachXO2ZE variants combine a low-power, small form factor FPGA fabric with Embedded Block RAM (EBR), Distributed RAM, and User Flash Memory (UFM) blocks developers can use to implement a variety of functions in high-volume Edge devices.

Other capabilities such as robust I/O support (1.2 to 3.3V), low-voltage differential signaling (LVDS), and integrated phase lock loops (PLLs) are intended to further broaden the scope of applications these devices can support.

Two new MachXO2ZE devices are available in the WLCSP packaging, offering 1,200 and 4,000 LUTs in either a 2.5 x 2.5 mm (28 GPIO) or a 3.8 x 3.8 mm (63 GPIO) sized package.