Cadence Design Systems and Rambus, a chip and silicon IP provider, have entered into a definitive agreement for Cadence to acquire the Rambus SerDes and memory interface PHY IP business.

Rambus will retain its digital IP business, including memory and interface controllers and security IP. The expected technology asset purchase also brings Cadence proven and experienced PHY engineering teams in the United States, India and Canada, further expanding Cadence’s talent base.

“Memory and SerDes IP design and integration continues to be integral to the design of AI, data centre and hyperscale applications, CPU architectures and networking devices, and the addition of the Rambus IP and seasoned team further accelerates Cadence’s Intelligent System Design strategy,” said Boyd Phelps, senior vice president and general manager of the IP Group at Cadence. “The acquisition of the Rambus PHY IP broadens Cadence’s well-established enterprise IP portfolio and expands its reach across geographies and vertical markets, such as the aerospace and defence market, providing complete subsystem solutions that meet the demands of our worldwide customers.”

“The accelerating momentum of AI and continued growth in the data centre is driving ever-increasing demand for memory and security,” said Sean Fan, senior vice president and chief operating officer at Rambus. “With this transaction, we will increase our focus on market-leading digital IP and chips and expand our roadmap of memory solutions to support the continued evolution of the data centre and AI.”

The transaction is expected to close in the third calendar quarter of 2023, subject to certain closing conditions.