Cadence and TSMC look to accelerate radar, 5G and wireless Innovation

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Cadence Design Systems is working with TSMC to optimise its Virtuoso platform for the 79GHz mmWave design reference flow on TSMC’s N16 process.

With this latest development, customers will now have access to a complete 79GHz mmWave design reference flow on the N16 process for developing highly reliable, next-generation RFIC designs for use in radar, 5G and other wireless applications for the mobile, automotive, healthcare and aerospace markets.

Customers have already started using the corresponding TSMC PDKs for RFIC design work.

The Cadence RFIC solution features automation capabilities to help customers spend less time integrating critical RF functionality into their designs. It supports all aspects of RF design, including passive device modelling, assisted layout automation, block-level optimization and EM signoff simulations.

The TSMC N16 79GHz mmWave design reference flow incorporates an efficient methodology that makes it easier for engineers achieve their performance, power efficiency and reliability design goals.

Customers can also benefit from Cadence’s integrated Virtuoso ADE Suite and Spectre X Simulator with RF Option for managing corner simulations, design centreing and identifying true worst-case corners. In addition, the Virtuoso Layout Suite for RF layout automation includes expedited placement and routing with in-design design rule check (DRC) capabilities.

TSMC’s N16 79GHz mmWave design reference flow also supports high-capacity electromagnetic (EM) model generation, leveraging the Cadence EMX Planar 3D Solver, which is essential for RF circuits. The Virtuoso platform tightly integrates with the EMX Planar 3D Solver and Cadence Quantus Parasitic Extraction to enable layered extraction of coupling effects, ensuring full-design EM parasitic signoff. This tight integration allows seamless back-annotation of S-parameter models into a golden IC schematic or a Quantus SmartView with post-layout parasitics.

The flow demonstrates EM extraction using the Virtuoso EM assistant and stitching of the S-parameter model into the schematic for simulation and verification using the Virtuoso ADE Suite.

“Through our ongoing work with Cadence, we are empowering joint customers with the most advanced RF design tools and process technologies to bring innovative RFICs to market,” said Dan Kochpatcharin, head of the Design Infrastructure Management Division at TSMC. “The 79GHz mmWave design reference flow on TSMC’s N16 process makes it easier for our customers to quickly apply Cadence and TSMC innovations to their IC designs, and we can’t wait to see the differentiated RFIC products they can create with the flow.”