Engineering publications brought to you by Mark Allen

EDA & Design Software

Cadence Pegasus certified for Samsung 5nm and 7nm processes

Project looks to create platform for trusted electronics

Avery Design debuts CXL 2.0 System-level VIP simulation solution

Why semiconductor design is set to look very different

Synopsys acquisition expands DesignWare ethernet IP portfolio

Collaboration looks to accelerate hyperscale computing SoC design

Labcenter introduces Proteus v8.12

Cadence unveils next-generation Palladium Z2 and Protium X2 systems

Imperas releases free ISS for RISCV-V CORE-V developers in the OpenHW ecosystem

Machine learning capabilities added to DFM signoff for FinFET solutions

First complete IP solution for PCI Express 6.0

Cadence unveils next-generation Sigrity X