Keysight introduces PathWave Design 2024

2 mins read

Keysight Technologies has introduced PathWave Design 2024, the latest release of its suite of electronic design automation (EDA) software tools.

The latest iteration gives design engineers new software automation, design data and intellectual property (IP) management, team collaboration, and development lifecycle transformation capabilities.

PathWave Design 2024 EDA software delivers the following engineering productivity enhancements:

Software Automation

Keysight’s new Python API for EDA workflows establishes an open ecosystem to connect and control best-in-class simulators, platforms, data exchange, and report generation to meet specific development project needs. The Python API enables Keysight’s EDA software tools to interoperate with third-party partner tools in custom-tailored automation workflows. For example, it supports more efficient design verification and provides greater confidence for attaining first-pass success. In addition, Keysight speeds the development of automated workflows themselves by offering professional consulting and customisation services for PathWave Design 2024 customers.

The Python API addresses customer requirements to use the tools in a larger ecosystem environment and control Keysight EDA software programmatically. It includes documentation and examples on how to tackle common automation challenges making Keysight tools a component of larger enterprise workflows.

IP and Design Data Management

Keysight has integrated the former Cliosoft products into the PathWave Design 2024 software suite.

Keysight Design Data Management (formerly Cliosoft SOS) is intended for hardware design engineers seeking a comprehensive and efficient design data management platform. It provides engineers with a number of features and benefits such as optimal file archiving, advanced revision control, disk storage optimisation, tight EDA vendor integration, and seamless software configuration connectivity.

With Keysight IP Management, IP and system designers can streamline their IP processes and maximise productivity. Keysight IP Management enables engineers to organise, catalogue, and track valuable IPs, ensuring easy access and efficient reuse across design projects. It provides enhanced traceability, enabling engineers and managers to monitor the entire lifecycle of their IPs and make informed decisions.

Simulation Acceleration

Using Keysight’s Design Cloud for parallel simulation dramatically improves designer productivity, reducing simulation time by up to 80% for circuit simulation and EM simulation and enabling faster design cycles with better simulation coverage to reduce design risk. Keysight’s Design Cloud uses parallel computing across hardware deployments ranging from on-premises clusters to private, public, and hybrid clouds, and through a turnkey cloud solution.

PathWave Design 2024 enables a new Design Cloud use-case for parallel simulation supporting electrothermal (ETH) simulation for radio frequency (RF) power amplifier design. ETH parallelisation increases the accuracy of typical RF circuit simulations with dynamic large-signal stimulus, which is important for 5G and 6G applications. Parallel simulation enables coverage of more temperature corners in a shorter simulation time.

Commenting Niels Faché, Vice President and General Manager, Keysight EDA, said, “Keysight’s EDA products give customers the design, simulation, and API capabilities required to automate workflows optimised for their specific domain and application context.

“Our enterprise EDA customers are emphasising digital transformation of design tool workflows and data management processes to better serve their global engineering footprints.

“Given today’s shortage of engineering talent, they need to scale up output from available resources and maximise ROI from people and technology through more efficient utilisation of design data and IP. PathWave Design 2024 addresses these issues head-on to deliver open, interoperable tool environments that improve productivity for engineering organisations engaged in complex circuit, chip, multi-technology module, board, and system design.”