Synopsys has unveiled the DesignWare System Level Library. The library provides high performance SystemC transaction level simulation models (TLMs) for assembling virtual platforms, including instruction set simulators (ISS), and TLMs of Synopsys’ DesignWare cores and AMBA components.
Markus Willems, Synopsys product marketing manager for system level solutions, said: “All models are written in SystemC, which is the language of choice for the target applications. The product is tool independent and can be used in any IEEE compliant SystemC simulator.” TLMs are the basic building blocks required to build virtual platforms for early hardware/software codesign, architectural exploration and system verification. Virtual platforms are fast, full function simulation models of the hardware that enable development and integration of software months before hardware is available. The Library features more than 50 TLMs, including high performance microprocessor models and models of DesignWare standards based connectivity IP such as USB 2.0 HS OTG, SATA AHCI and AMBA components. Also included are preassembled models of complete platforms which can be used as reference designs for driver development or as a starting point for building larger virtual platforms.