The BoW specification defines a chiplet-to-chiplet physical interconnect for power- area- and cost-efficient data transport between chiplets.
Avera Semi has developed the specification in cooperation with Aquantia, Netronome, GLOBALFOUNDRIES and Xilinx, as a part of the Open Domain-Specific Architecture (ODSA) sub-project in the OCP.
The exponential growth of data and compute-intensive applications at scale require the development of new domain-specific architectures for compute, networking and storage applications.
These heterogeneous architectures will combine general purpose compute and accelerators such as GPUs, FPGAs, SmartNICs, Persistent Memory and other domain-specific programmable devices.
These architectures will need to be customized and cost-efficient across a wide range of performance and form factors.
Chiplet-based designs that combine heterogeneous processing elements in a single package are a promising approach to developing these domain-specific architectures.
The ODSA Project aims to create an open interface between chiplets, so that best-in-class chiplets from multiple vendors can be combined to create custom products.
The overarching benefits of BoW enable efficient data movement between chiplets in heterogeneous designs. In many applications, BoW can be leveraged to build multi-chiplet products without software driver involvement.
The BoW specification aims to offer a solution that combines interface design simplicity with the ability to use low-cost, multi-chiplet packaging technologies.
The ease of design adds the ability to be implemented across a wide range of manufacturing process nodes, promoting heterogeneous design. Reduced wire count enables BoW technology to be used with low-cost packaging technology.
The release of this proposal, available today, gives new companies an opportunity to participate in creating a 1.0 draft proposal.
