“At imec, we are using the system now on a routine basis to test our 40µm-pitch micro-bumped wafers,” stated Erik Jan Marinissen, principal scientist at imec.
“As everything in the semiconductor realm, also micro-bumps are subject to downscaling. Hence, with Cascade, we have started experiments to also probe our 20µm-pitch micro-bump arrays, and those look promising.”
One of the challenges of 3D IC stacking is probing of the individual chips, before being stacked, to ensure a good yield of the 3D stacked ICs.
The inter-chip connections of 3D stacked ICs are made by large arrays of fine-pitch micro-bumps which makes probing these bumps a challenge. Until today, the probing solution is to add dedicated pre-bond probe pads to the to-be-stacked dies, but this requires extra space and design effort and increases test time.
Instead, the new fully automatic test cell can provide test access by probing large arrays of fine-pitch micro-bumps. The system is based on a Cascade Microtech CM300 probe station and National Instruments PXI test instrumentation, complemented by in-house developed software for automatic test generation, data analysis, and visualisation.
The system allows testing of wafers up to 300mm diameter, including thinned wafers on tape frame with exposed through-silicon vias.
