AP Memory high density silicon capacitor passes customer validation

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AP Memory, a designer of customised memory solutions, has announced that its new generation stack silicon capacitor (S-SiCap) Gen3 has passed customer validation.

The S-SiCap is a high capacitance density and very low profile (<100um thin) silicon capacitor that can be integrated with System-on-Chips (SoC) with advanced packaging processes. It can be customised to meet the application requirements of high-end smartphones and High-Performance Computing (HPC) chips.

The S-SiCap uses a stacked capacitor, offering higher capacitance density, smaller size and thinner form factor compared to deep trench capacitors.

The capacitance density can reach 2.5uF/mm2, with a maximum operating voltage of 1.2V and is able to demonstrate improved temperature and voltage stability. In addition, it has low equivalent series inductance (ESL) and low equivalent series resistance (ESR), providing enhanced voltage stability during high-frequency operation.

S-SiCap provides low profile and customisable product dimensions. In advanced packaging processes, it can meet various integration applications and be placed closer to SoC. For example: S-SiCap on the landside, S-SiCap embedded in package substrate, S-SiCap for 2.5D packaging, and S-SiCap in an interposer.

According to AP Memory's President, Hong Chih-Hsun, the trend for high-end mobile phones and HPC applications, means that SoCs need to deliver higher levels of performance.

“However, this may come with increased power consumption and voltage instability. If customers aim for stable voltage operation in these applications, they will need more robust capacitor technology. AP Memory's S-SiCap Gen3 surpasses traditional capacitor technology by providing higher capacitance density, lower profile, and greater application versatility; all of which significantly enhance SoC performance in advanced packaging processes.”