Engineering publications brought to you by Mark Allen

ASIC & SoC

Menta eFPGA partners with Codasip

Aldec updates Riviera-PRO with inclusion of OSVVM 2020.08

Silicon Labs selects Imperas RISC-V Reference Model for verification

OpenFive licenses Flex Logix's eFPGA

Broadcom debuts 5nm ASIC for data centre and Cloud infrastructure

Pinnacle Imaging Systems launches Denali 3.0 programmable ISP

Apple launches MacBook laptops using first in-house designed microprocessor

MediaTek targets mass market 5G smartphones with Dimensity 700

A clearer roadmap

Xilinx introduces Zynq RFSoC DFE for mass 5G radio deployments

Aldec’s TySOM family now supports Xilinx PYNQ

Mentor announces partnership with Arm