Engineering publications brought to you by Mark Allen

ASIC & SoC

ASIC conversion technology promises new chips for old within 20 weeks

Semtech introduces SyncE hybrid mode and single chip boundary clock

Array features more than 1million asic gates

SmartFusion cSoC supported by FreeRTOS

FPGA based prototyping solution provides 4x faster performance for Renesas Electronics

SoC range takes multimedia ‘in new directions’ claims ST

HSPA+ libraries launched for dsp core

ARM ‘no longer at the top of the mobile mountain’ says MIPS

CMOS technology enables higher data rates over poorer quality optical fibre

Five year wait predicted for 3d chips

Chipmakers demand better system level support from EDA vendors

Research will transform the future of technology claims Intel