Ultra-low-jitter family of LVCMOS clock buffers

Integrated Device Technology has unveiled a new family of clock buffers. The 5PB11xx family of LVCMOS fan-out buffers is able to provide low-jitter metrics of sub-50 fsec RMS additive phase jitter (12KHz to 20MHz), as a result it is able to offer system designers greater jitter margin to help meet system clock requirements. The small die size enables the chip to fit within a DFN 8-pin package as small as 2 by 2 millimeters.

The buffers are intended for high-end consumer, industrial, data communications, telecommunications and computing applications where both timing budget and board space are at a premium.

The new buffers are available with 2, 4, 6, 8 and 10 LVCMOS outputs and can support 1.8V, 2.5V and 3.3V power supplies and outputs. They have a low output skew of 50 psec with only 14mA core current consumption. All the devices in the new buffer family are characterised at an extended temperature of -40C to 105C enabling the new buffers to meet the requirements of automotive infotainment applications as well.

Along with the 5PB11xx family, IDT has introduced a 551S and 553S 1:4 LVCMOS fanout buffer series with sub-50 fsec additive jitter in industry-standard 551 and 553 footprints. These devices are also available in 2-by-2-millimeter DFN 8-pin packages and support 1.8V, 2.5V and 3.3V power supplies and outputs.