Microchip introduces solution for 800G AECs used for Generative AI networks

The demand for generative AI and AI/ML technologies is fuelling the need for more high-speed connections and the push toward 800G connectivity in backend data centre networks and applications.

While this can be optimally addressed using Active Electrical Cables (AECs), there are a number of design and development hurdles for cable vendors to overcome.

To address this, Microchip Technology has announced an accelerated development path for these Quad Small Form Factor Pluggable Double Density (QSFP-DD) and Octal Small Form Factor Pluggable (OSFP) AEC cable products using its META-DX2C 800G retimer.

The retimer is supported by a solution for 800G AEC product development including a hardware reference design and a complete Common Management Interface Specification (CMIS) software package to minimise development resources needed for cable manufacturers.

The META-DX2C retimer uses high-performance, long-reach 112G SerDes that can support up to 40 dB reach, enabling the design of thinner and longer AECs that are crucial for dense hyperscaler infrastructure buildouts.

Additionally, Microchip is offering a fully validated paddle card hardware reference design and a software package that implements the CMIS software in a Microchip 32-bit PIC32 microcontroller. Microchip’s META-DX2C compact retimer can also solve similar connectivity challenges in high-capacity data centre switches and routers where high density and data rates create signal integrity problems. 

Microchip ’s META-DX2C 800G AEC solution is supported by a paddle card reference design that includes the META-DX2C retimer, PIC32 microcontroller, oscillators, buck regulator and linear voltage regulator, all of which can be sourced from Microchip.

The included software development kit supports the CMIS 5.2 specification.