Surrey Nanosystems secures £4.5million funding

The funding has been received from a consortium led by New Wave Ventures. According to the Newhaven based research centre, the funds will be used to commercialise innovations in materials to support the continued scaling of integrated circuits. These include an advanced dielectric thin film for insulation applications and a process for growing carbon based interconnections or 'vias'. Surrey Nanosystems believes progress in both of these back end of line semiconductor fabrication areas is critical if manufacturers are to continue silicon's evolution to next generation geometry sizes, operating speeds and power conservation. "The new funding will be used to take our proven technology to the next stage - to demonstrate it at a scale compatible with the lithography and wafer sizes used in today's high volume semiconductor manufacture", said David Wong, CEO of Surrey NanoSystems. "We are cooperating with leading players in the semiconductor industry and within the next two to three years we expect to be able to offer the technologies in forms suitable for commercial use." The new funding is being provided by New Wave Ventures in conjunction with Parkwalk Advisors and further investments from Surrey NanoSystems' existing backers Octopus Ventures, IP Group and the University of Surrey. Reducing leakage current is a critical requirement for the continued scaling of semiconductor devices. Surrey NanoSystems has developed a new class of high performance dielectric material for interlayer or intermetal insulation. With an effective dielectric constant of less than 2.4, it offers an advanced alternative to current 'low k' semiconductor insulation materials. According to NanoSystems, it also has the advantages of having high Young's modulus and hardness, being non porous, and offering excellent resistance to the liquid chemicals employed in semiconductor processing - making it a robust and reliable material for IC fabrication. Another target application is a replacement material for the vertical connections that link the layers of an integrated circuit, as the copper currently used is becoming more resistive as the geometry sizes of ICs shrink to ever smaller dimensions. Carbon nanotubes (CNTs) can be structured to act as more efficient conductors, but their adoption has been hindered by the fact that conventionally grown CNTs require temperatures of around 700°C - too high for semiconductor processing. In contrast, Surrey NanoSystems' fabrication system and process allows high density CNT structures to be grown at silicon friendly processing temperatures of 350°C or less.