Scalable 32bit dsp cores set to address range of applications

Moshe Sheier, director of product marketing, said: "Applications have become more complex in the last couple of years and this has required special attention, for example, reducing power consumption and smaller die sizes." CEVA claims TeakLite-4, in its smallest instantiation, will require less than 100,000 gates and says this is 25% smaller than previously. Sheier added: "The core is scalable and flexible. It can do quad 32x32 multiplications, which allows complex filters to be created." Four variants of TeakLite-4 will be available. The CEVA-TL410 and CEVA-TL411 dsps offer single and dual 32x32bit multipliers respectively, targeting voice and audio codecs and hubs, while the CEVA-TL420 and CEVA-TL421 dsps offer additional fully cached memory subsystems and AXI system interfaces, targeting application processors and home audio SoCs. Each core uses a variable 10 stage pipeline and can run at up to 1.5GHz on a 28nm process. Where the cores are used will depend upon the target application. The TL410, for example, is likely to be used in power efficient audio codecs. "But the gaming end of the market is a much tougher challenge," Sheier noted. Here, 256 MP3 channels are used to represent the various objects and these need to be mixed with up to 32 voice channels.