Optima launches IC Security Verification Solution

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Optima Design Automation, a specialist in next-generation functional safety and IC-security verification, has launched a new hardware security verification solution, Optima-SEC.

Optima-SEC has been developed to enable Pre-Silicon verification of Fault Injection Attacks and certifies the counter-measures adopted against such attacks, which target the extraction of secret information by side-channels.

Optima-SEC ensures that security verification is highly automated and accelerated all in pre-silicon. Currently, most security verification is done post-silicon and comes late in the design cycle, with low visibility and high costs for correcting any vulnerability found at that stage.

“Security verification is done in post-silicon mostly because none of EDA solutions available nowadays can effectively verify security vulnerabilities and do fault attack simulation at the RTL level”, explained Jamil R. Mazzawi, CEO of Optima Design Automation. “Optima-SEC provides a specialised modelling layer, on top of its fault-simulator, that allows our customers to model any type of attacks they want. This is in addition to the provided built-in models for laser-attack and EM-attack”, added Jamil.

“Optima-SEC is based on the patented FIE (Fault Injection Engine) technology, with orders of magnitude faster fault-simulator. FIE was originally developed for Functional Safety, and now adopted for the needs of security Fault-Attack-Simulation (FAS), to verify security vulnerabilities”, added Sesha Sai Kumar C V, Applications Engineering Director.

Designers plan and implement countermeasures to avoid leakage of the information due to the Fault Injection Attacks.

“Optima-SEC enables our customers to verify these countermeasures right at the RTL level, so that Differential Fault Analysis (DFA) of proposed fault attacks are simulated and verified at RTL," explained Sesha.