Next gen DRL technology unveiled
Akya has launched ART2.1, the next generation of its dynamically reconfigurable logic (DRL) technology.
ART2.1 can run up to twice as fast as its predecessor and will work 'significantly better' with code generated by high level language compilers.
"We're offering DRL IP that is faster and more efficient than last year and better able to handle C compiled code," said Akya ceo Colin Dente. "ART2.1 not only enables dsps with flexible logic, but also devices that are smaller, faster and more power efficient than software dsps."The two main innovations in ART2.1 are: a modified configuration instruction pathway, which allows up to twice the system clock speed of ART2.0; and an augmented Interconnect Sequencer instruction set, improving the performance of code generated by, for example, C compilers.
