New ARM physical IP delivers optimised performance for 28nm applications

The processors have been optimised for mobile, networking and enterprise applications and are designed to deliver a performance from 1 to 1.6GHz for worst case conditions – with up to 2GHz in typical conditions. This, says ARM, provides a wide range of flexibility for SoC designers to optimise performance and energy efficiency using the ARM Artisan Physical IP platform and Cortex-A9 POP. "As consumer demand for high performance, energy efficient mobile devices increases, Globalfoundries and ARM are lowering the risk for customers by delivering optimised Cortex-A9 cores on a proven 28nm SoC process," said Kevin Meyer, vice president of Design Enablement Strategy and Alliances, Globalfoundries. "This latest ARM physical IP solution for our 28nm SLP process delivers industry leading performance and energy efficiency, while also decreasing time to market for customers' latest mobile products." Globalfoundries' 28nm Super Low Power (SLP) platform is designed for power sensitive mobile and consumer applications and is based on the company's 32/28nm HKMG technology. ARM already supports the Globalfoundries 28nm SLP process with an Artisan physical IP platform. This includes process tuned 9 and 12 track multi Vt standard cell libraries, power management kits, eco kits, ARM Artisan high density and high performance optimised memory compilers, as well GPIO through the ARM DesignStart online IP access portal. "Smartphones are increasingly becoming the devices that consumers rely on for a wide range of applications," said John Heinlein, vice president of marketing, physical IP division, ARM. "To deliver the user experience that they would expect, OEMs and their semiconductor suppliers must deliver on the promise of high performance and energy efficiency. Single and dual core Cortex-A9 processor based mobile devices are already widely available and delivering on this demand. The new 28nm POP provides an easy next step to maintain a competitive edge." According to ARM, the POPs include three critical elements necessary to achieve an optimised ARM core implementation: Artisan Physical IP logic libraries and memory instances, specifically tuned for a given ARM core and process technology; a comprehensive benchmarking report to document the exact conditions and results ARM achieved for the core implementation; and a POP implementation guide that details the methodology used to achieve the result.