Industry leading PLDs now in wlcsp package

According to Lattice, the MachXO2 devices combine an extremely small footprint - until now unprecedented in the programmable logic market - with the 'industry's lowest power and most feature rich' low density PLDs. The range is built on a low power 65nm process featuring embedded Flash technology and is designed to deliver a 3X increase in logic density, a 10X increase in embedded memory and more than 100X reduction in static power compared to previous generations. "WLCSP is a superior packaging solution for markets that demand the smallest possible form factor," said Mike Orr, Lattice's vice president of Product Development. "WLCSP features outstanding performance for signal integrity, power management and thermal characteristics. WLCSP is also cost effective, reliable and uses standard board mounting processes for simple handling and manufacturability." According to Lattice, the MachXO2 range provides the lowest power and highest functionality of any PLD family on the market. "We have combined aggressive packaging technologies to deliver some of the smallest PLD footprints ever in the programmable logic industry," added Shakeel Peera, director of marketing for Silicon and Solutions at Lattice Semiconductor. "When these footprints are combined with the superior functionality and ultra low power available on the MachXO2 devices, we are able to address a new class of applications not previously available to SRAM based PLDs. There is little doubt that consumer device connectivity and space constraints are moving in opposite directions. These new MachXO2 devices will enable new possibilities for digital logic designers focused on these space constrained applications, without having to sacrifice flexibility or programmability." The MachXO2 LCMXO2-1200ZE devices in the 25 WLCSP are now available as engineering samples, with production devices scheduled to be available by Q4 2011.