Functional verification of SK hynix's DRAM requires simulating large transistor-level designs with tens of millions of transistors and hundreds of millions of parasitic post-layout elements across several modes of operation and process, voltage and temperature (PVT) corners. The Spectre FX Simulator was chosen as it is able to deliver optimal capacity for handling these huge designs with fast simulation performance to complete verification and meet stringent tapeout deadlines.
SK hynix said that it leveraged the simulator to check critical output data signal values and top-level currents and timing measurements, enabling it to verify design behaviour and ensure that the designs met their functionality, timing and power specifications.
In addition, the simulator provides an intuitive use model with minimal simulation-tuning requirements accompanied by excellent accuracy and performance balance to speed up given verification tasks.
SK hynix is using the Spectre FX Simulator's highly scalable multicore architecture to perform parallelization of transient simulations, allowing design and verification teams to further improve simulation turnaround time by utilizing the hardware resources available without having to trade off accuracy.
"Our DRAM designs require several high-accuracy chip-level FastSPICE simulations across many process corners to ensure their timing, power and other attributes meet demanding specifications while delivering our products on time to the PC and mobile computing markets,” said Mr. Do Chang-ho, Head of Computer Aided Engineering at SK hynix, Inc. “As a result of our collaboration with Cadence, the Spectre FX FastSPICE Simulator has been qualified and deployed in production for PC and mobile DRAM verification and is being expanded to HBM and graphics DRAMs. The Spectre FX Simulator enables breakthroughs in design methodology and significant productivity gains.”
The Spectre FX Simulator is part of the Spectre Simulation Platform, which offers a complete simulation solution that encompasses multiple solvers to allow a designer to move easily and seamlessly between circuit-, block- and system-level simulation and verification tasks.
