Aldec platform supports newest fpga devices

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Electronic design verification specialist, Aldec has launched an HDL based fpga design and simulation platform that supports the newest fpga devices.

According to Aldec, Active-HDL version 9.1 is a high performance, mixed language solution that interfaces with nearly 100 third party vendor tools, providing fpga designers with a single platform that can be used independently from the targeted fpga design flow. It supports design creation and simulation of the newest devices from companies such as Altera, Atmel, Lattice, Microsemi, Tabula and Xilinx. The latest release of Active-HDL includes new features such as integration with Aldec Riviera-Pro verification products; an HDL code browser tool; unified coverage database; extended documentation support to assist in DO-254 compliance requirements; and improvements to the block diagram editor and waveform viewer. Satyam Jani, Aldec Software Division product manager, said: "This release of Active-HDL allows users to switch between Aldec products during different stages of design and verification. The advanced verification interface allows users to move between products effortlessly and automatically generates scripts which can be used to run simulation on 64bit machines using Aldec's Riviera-Pro verification products." According to Aldec, this enhanced level of automation enables users to save a 'significant' amount of time and detect errors in the source code even before compilation.