8051 available as IP core

The M8051 family consists of four 8051 compatible cores: the M8051W, a high performance, two cycle implementation of the 8051 architecture; the M8051EW, a debug enhanced version of the M8051W; the M8051, a classic 12 cycle implementation the 8051 architecture; and the M8052, an enhanced M8051 with more memory and a third timer “The M8051 has been one of our most popular lines of IP with many customers both large and small,” said Aaik van der Poel, manager of Mentor Graphics’ continuing engineering division business unit. “IPextreme’s experience in the IP business and its ability to continue to make this product available will delight our many customers.” Originally part of Mentor Graphics’ Inventra IP business, the M8051 is binary compatible with 8051 devices and available in Vhdl and Verilog formats. IPextreme will package the M8051 cores in its XPack technology, with support for major eda flows, including Mentor’s Precision FPGA synthesis tool. “The 8051 is the most successful microcontroller architecture of all time and still enjoys strong demand in many consumer and industrial applications. We are excited to be able to offer mature, silicon proven 8051 products to our customers in a synthesisable, eda neutral format,” said Rick Tomihiro, IPextreme’s vp of marketing.