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NAND continues to evolve to meet industry’s needs, but challenges lie ahead

4 mins read

The digital memory industry is in a period of dramatic change. The evolution from PCs to mobile and tablet computing platforms is driving a shift towards the use of NAND flash for embedded memory designs.

Since Toshiba invented NAND flash memory in 1984, capacity has increased and cost per gigabyte has fallen. Yet many challenges and opportunities lie ahead in what has become an increasingly competitive segment. Digital data is being created, stored and shared at a phenomenal rate, causing an 'information explosion' that is threatening to overload businesses and consumers. Market researcher IDC predicts that, over the next few years, worldwide installed raw storage capacity will climb from 2,596 exabytes (Ebyte) in 2012 to 7235Ebyte in 2017, where 1Ebyte is 1018 byte, or the storage available on 31million 32Gbyte iPads. The rise of smart devices is driving a surge in demand for NAND flash technologies that can be embedded into small form factors. In addition, NAND based storage devices, such as solid state drives (SSDs) and USB pen drives are replacing traditional hard drives (HDDs) and optical media in many applications, especially where fast data access speeds are critical. In many 'big data' and cloud storage systems, SSDs sit at the top of tiered storage systems that include a range of SSDs and HDDs. As demand for NAND has increased, the cost per gigabyte has decreased – further driving demand. One reason for this is the steady increase in the density of data that can be stored. NAND flash has been at the forefront of lithographic scaling and NAND devices are among the densest ICs being produced in volume. Since the introduction of NAND in 1984, the size of the process node has dropped from 0.7µm to less than 20nm. Coupled with the introduction of new cell level technologies, the bit density of NAND has increased by more than 2000 times. Meanwhile, the price per Gbyte has decreased even faster than bit density has increased. In addition, the introduction of more efficient and more automated processes, as well as a shift to larger wafers, have all helped NAND become the storage medium of choice for many applications. Mass production of NAND at the 15nm node has recently started and devices with a high speed interface will soon be in the supply chain. These new NAND chips have the same write speeds as 19nm NAND chips, but boost data read rates by 30% to 533Mbit/s. NAND challenges One of the key challenges for those wanting to use the very latest raw NAND devices in their systems is that these devices tend to require more powerful error correction code (ECC) engines to be built into the controllers. This has become an on going race as, generally speaking, there is often a wait for the controllers to catch up. Because NAND memory blocks can degrade, an upper limit is placed on the number of writes to each location. These so called 'wear levelling' algorithms also need to be built into NAND controllers to ensure memory locations are used evenly. One challenge associated with migrating to smaller processing nodes is the need for more complex ECC and increasingly powerful host controller processors. For 43nm single level cell (SLC), only 1bit of ECC is required per 512byte. This increases to 8bit of ECC per 512byte with 24nm SLC NAND. Figure 1 compares the cost-down advantages of advanced process technologies with the associated increases in ECC complexity. For many applications that use SLC NAND memory, the 1bit ECC is implemented in the host software with no significant effect on application performance. Migrating to 'cutting edge' memories that require 4, 8 or even 24bit ECC increases demand on the processor significantly, reducing performance. In order to avoid this performance penalty, NAND chips with embedded ECC have become the preferred solution and Toshiba's BENAND is such a solution. It is important to note that BENAND uses the common NAND interface, thereby ensuring compatibility with general SLC NAND flash in areas such as command set, device operation, packaging and pin configuration. For those wanting to reduce the number of system components and to not worry about the need to design in controller architectures, e-MMC NAND integrates the memory and controller in one package. These devices are typically used in high speed memory cards and USB pen drives and are compliant with JEDEC standards. Embedded controllers perform operations such as error correction, wear levelling and bad block management to ensure the memory operates correctly (see fig 2). Meeting increased capacity demands While the technology exists to make NAND at even smaller process nodes, endurance and reliability start to come in to play as the cells get smaller. To overcome this, NAND cells that can store multiple bits have been developed – SLC can store 1bit/cell, multilevel cell (MLC) can store 2bit/cell, while triple level cell (TLC) can store 3bit/cell. However, write/erase endurance is affected by such approaches – while SLC can endure around 100,000 cycles, MLC is only good for 5000 cycles and TLC just 1000 cycles. SLC and MLC NAND are commonly found in enterprise grade SSDs that need to withstand frequent write/erase cycles. MLC and TLC NAND are found in consumer grade SSDs, where read speed and price per Gbyte are the most important factors. One way to avoid the problems associated with adding more bits per cell is to look to new NAND technologies. The closest of these to full production is 3D NAND, where NAND flash layers are stacked upon each other so the horizontal dimensions do not need to be shrunk to access the next levels of increased density. Toshiba is in the process of building a new fab in Japan to meet the demands of 3D NAND production. Future memories Since its invention in 1984, NAND flash has proven to be a disruptive technology. It has displaced optical and hard disk drives from many applications and enabled the recent 'smartphone revolution'. NAND flash has become ubiquitous and can be found in applications ranging from USB flash pens to cloud computing servers via an almost endless list of 'smart devices'. Yet advances with other technologies such as MRAM could prove to be even more disruptive than NAND itself. Magneto-resistive random access memory (MRAM) is one technology that is looming on the horizon. This form of non volatile memory is extremely fast, has virtually unlimited write/erase endurance and the potential to change the way electronic systems access NAND flash. Today, people use NAND flash like an HDD; they copy information at power up from NAND into DRAM, then execute the code from DRAM. With MRAM, you don't have to shadow anymore; it's already there when you turn it on and is much faster – basically close to DRAM speed. This also means you need less endurance from NAND flash, which could then be used for longer term data archiving. Axel Stoermann is general manager, memory technical marketing and application engineering, with Toshiba Electronics Europe.