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High Speed Digital Seminars 2014

17th June 2014, Winnersh
18th June 2014, Cambridge

This seminar will guide delegates on how to successfully navigate through today's high speed technology challenges, from early design to prototype validation, whilst ensuring compliant designs. Who should attend: Engineers and Managers who are responsible for ensuring successful and predictable design or test validation of complex PCBs and systems for high speed digital application (PCIe, DDR, USB, HDMI). Seminar topic will cover: • Trends in data communications and the related test challenges • Simulation-measurement workflow for DDR compliance • Signal Integrity including Jitter (RT Hi-end scopes)