Agilent presents High Speed Digital Design and Validation Seminar

When digital signals reach Gigabit speeds, "unpredictable" becomes the normal state of things. The process of getting your project back on track starts with the best tools and methodology for the job. This seminar will guide you on how to successfully navigate through today's high speed technology challenges from early design to prototype validation whilst ensuring compliant designs. Learn all about Signal Integrity challenges in High Speed Digital links and how you can anticipate and reduce these effects on your design Who should attend: Engineers and Managers who are responsible for the design or test validation of complex PCBs and systems 19th April in Winnersh 25th April in Manchester 26th April in Edinburgh Agenda: 09:00 Registration 09:30 Welcome 09:45 Key Challenges in the analysis and design of high speed digital links 10:45 Why Use Simulation Tools for High Speed Signal Channel Design? 11:30 Break 11:45 Measurement Techniques of Serial Signal and Fast Rise Time Signals 13:00 Lunch & Networking 14:00 BGA Probe Case Study: Using Simulation Models to Extend the Reach of Instrumentation 15:00 A Day in the Life of a Memory System Architect 16:00 Conclusion To find out more or to register simply click on the link below and let us know on which location you want to participate. REGISTER HERE! After receiving your registration we will send you a confirmation within a few days. Refreshments will be served throughout the day. We look forward to seeing you there! Yours sincerely, Agilent High Speed Digital Design Team!