DVCon Europe is a new technical conference in Europe addressing the application of standardised languages, tools, and methodologies for the design and verification of electronic systems and integrated circuits.

DVCon Europe is a new technical conference in Europe addressing the application of standardised languages, tools, and methodologies for the design and verification of electronic systems and integrated circuits. The event is intended to share best practices on: • The application of system level design and verification languages such as SystemC, SystemVerilog or e • The use of SystemVerilog Assertions or the Property Specification Language • Verification methodologies based on the Universal Verification Methodology • IP reuse, automation and integration standards based on IP-XACT • Low power design and verification using the Unified Power Format