Engineering publications brought to you by Mark Allen

Embedded & Programmable

Component Chooser capture 5million attributes

Xilinx puts Cortex-A9MP into fpga fabric for ‘new class of device’

Next gen DRL technology unveiled

License agreement addresses fpga security

Doulos and Feabhas form strategic training partnership

Altera launches Stratix V fpgas

Another dimension

Getting smarter: Three in one platform to enable platform design.

Chip reduces number of unique I/O configurations

Tier Logic comes out of stealth, targets design and production needs

Putting pieces together

Three into one