OUTLOOK 2017: A system level view of automotive requirements

5 mins read

As traditional automotive design flows struggle to create complex SoCs, EDA companies are producing tools that treat the car as a ‘system of systems’.

The latest vehicles are electronic systems on wheels, often boasting more lines of code than commercial aeroplanes. Every part is interrelated and, as such, must be designed, optimised and verified simultaneously to ensure the completed car performs as intended, safely and reliably.

With autonomous driving features becoming more pervasive – and self driving cars already being tested on roads – vehicles will continue to feature more sensor clusters, compute power, car-to-object communication technology, high-bandwidth Ethernet networks and high-definition displays. These technologies not only serve to enhance the driver and passenger experiences, but also provide safety features, such as lane departure warnings and pedestrian detection.

“Since the respin of chips is very expensive, automotive engineers need to ensure the chips are specified correctly right from the beginning so they work seamlessly within the overall context of the car.”

Robert Schweiger

Design and verification tools, intellectual property, new algorithms and runtime software play critical roles in ensuring these sophisticated vehicles will not only work well, but also won’t be hampered by road and environmental conditions. Validating that electronic circuits won’t fail due to factors such as hardware design flaws and software bugs is critical, as is ensuring they can withstand component tolerances, temperature variations, electromagnetic interference, stress induced failure mechanisms like electromigration and electrostatic discharge, and a host of other factors. What’s more, by simulating automotive electronic subsystems with each other, engineers can ensure each interconnected subsystem will persevere over years of use. In short, exhaustive simulations, fault analysis, EMI/EMC analyses and yield and reliability analyses are vital tactics in meeting automotive design specs, including functional safety standards dictated by ISO 26262.

ADAS – driven by data
Advanced driver assistance systems (ADAS) bring vehicles greater awareness of their surroundings. These systems include traffic sign recognition, adaptive cruise control, driver monitoring, automatic parking, collision avoidance and lane departure warning. In-vehicle sensors collect vast amounts of data, sending it to various subsystems that must process this data accurately in real time in order to make informed decisions that will determine driver/passenger safety and the overall driving experience. Eventually, technologies will become sophisticated enough for vehicles to exchange data with each other and their environment to make driving even safer. According to Research and Markets1, the ADAS market is projected to be worth $5,76billion in 2016, growing to $10.45bn by 2022.

Using automotive Ethernet, ADAS connects a variety of subsystems: imaging and video assistance; radar; LIDAR; voice control; gesture recognition; and in-vehicle infotainment. These subsystems often use specialised IP blocks to execute key algorithms for sensor processing, including computer vision, voice recognition, radar analysis and reliable communications.

Deep learning technologies, such as convolutional neural networks (CNNs), provide the backbone for recognising objects like traffic signs, vehicle and pedestrians, and for voice command interpretation.

Because of the precise requirements, off the shelf chips are not ideally suited for ADAS. This creates a challenge for OEMs and Tier 1 suppliers, and an opportunity for suppliers of tools, software, and services to create low-power, high-performance SoCs.

SoCs for ADAS need to meet high performance/low power requirements and, as a result, must be designed on advanced processes like 16nm FinFET. Since the respin of such chips is very expensive, automotive engineers need to ensure the chips are specified correctly right from the beginning so they work seamlessly within the overall context of the car.

As such, traditional automotive flows need to be overhauled to interface directly with IC tools that enable OEMs and Tier 1 suppliers to engage early in hardware/software coverification and optimisation, ideally, to provide SystemC or RTL simulation models as an executable spec to the semiconductor vendor. Unfortunately, traditional automotive flows are not prepared for this kind of task and rely more on rapid prototyping tools that will no longer work for complex SoCs.

Some ADAS design specifications include:

  • Compute performance of more than 1000GMAC/s, with support from a DSP architecture tuned to process compute-intensive algorithms while delivering an optimal power, performance and area ratio
  • Higher network bandwidth, up to 1Gbit/s
  • Greater integration

Optimising the entire vehicle
Vehicle design today needs to account for the end product. Engineers who design different subsystems need to collaborate to ensure interoperability. By viewing the vehicle as a system of systems, the team can then take account of internal and external factors that can impact vehicle operation. One advantage of this approach is that it supports early ‘test driving’ of a chip and the entire subsystem, well before bugs become too costly to fix and/or lead to time consuming and expensive respins. Such a process would also enable teams to optimise compute-intensive algorithms (such as voice, vision and communications) early in the development cycle and to verify the hardware and software together.

In order to integrate more functionality on a chip, along with greater data processing capabilities, automakers are turning to advanced semiconductor processes, such as ‘automotive ready’ 16nm FinFETs, 22nm FD-SOI and 28nm CMOS. They’re also integrating dedicated design, processor, verification and test IP, as well as packaging technologies, into their designs. Indeed, a new class of automotive SoCs and systems in package is emerging and, with them, new challenges.

Automotive semiconductors are expected to last at least 15 years and issues such as aging, temperature and electromigration can hamper transistor performance over that time. While technologies such as FinFETS bring power and performance advantages, they are also prone to self heating problems. Design tools that can mitigate these effects, enable total power signoff, perform simulation and analysis, and conduct reliability tests can all make an impact.

Hardware/software co-verification is critical because software is typically available long before the silicon. Being able to prototype and test a complete system, then evaluate various real functions, can help enhance performance and ward off problems in the field.

Consider, as an example, a camera system behind the rear view mirror in which a CNN runs on an ADAS SoC to enable object detection and tracking. Before silicon availability, the designer must develop, verify and optimise the hardware platform. A Tier 1 supplier that wants to test a complete ADAS can stream in video sequences of actual traffic. An OEM can validate and optimise a specific algorithm or debug a particular traffic scenario.

Uber started running its first fleet of self driving cars in Pittsburgh in summer 2016 and customers can use their smartphones to summon an autonomous car – a modified Volvo XC90 SUV. Initially, these cars are supervised by people in the driver’s seats, but Volvo and Uber agreed to develop a fully autonomous car by 2021. Other companies – including Audi, BMW, Daimler, Ford, GM, Google, and Tesla – are investing in autonomous driving R&D.

As automotive technologies continue to advance, OEMs and Tier 1 suppliers will need sophisticated design and verification tools and IP to help them deliver the safety and reliability upon which drivers, passengers and pedestrians will depend. Cadence, which has built its foundation on a broad portfolio of core EDA tools and packaging and board design tools, has extended its expertise and offerings to: encompass technologies, flows and services suited to optimising system designs for the right mix of power, performance and functionality; mitigate design risks before commitment to silicon; achieve fast time to market, even as chips and systems grow in size and complexity. With a history of collaborating with the automotive industry, Cadence has gained deep expertise in helping to solve its design challenges.

Traditional automotive design flows were not designed to deal with complex SoCs at advanced process technologies – especially if these devices become available very late in the design cycle. The road to increasingly smarter vehicles is lined with formidable challenges, but having the right design and verification tools and flows can go a long way in ensuring a safe and smooth drive.

1 Research and Markets, Global Advanced DriverAssistance Systems (ADAS) Market – Forecast & Analysis, 2016-2022.

Cadence Design Systems

Cadence is a leading provider of EDA and semiconductor IP. Its custom/analogue tools help engineers design the transistors, standard cells, and IP blocks that make up SoCs. Its digital tools automate the design and verification of giga-scale, gigahertz SoCs at the latest semiconductor processing nodes. IC packaging and PCB tools permit the design of complete boards and subsystems.

Cadence also offers a growing portfolio of design IP and verification IP for memories, interface protocols, analogue/mixed-signal components and specialised processors. Reaching up to the systems level, Cadence offers an integrated suite of hardware/software co-development platforms. In short, Cadence technology helps customers build great products that connect the world.