Silicon Labs announces broadest choice of PCI Express timing devices

The clocking solutions are designed to address the specifications of the PCIe Generation 1/2/3 standards. The portfolio includes both off the shelf Si5214x clock generators and Si5315x clock buffers for power and cost sensitive PCIe applications; and the Si5335 web customisable clock generator/buffer for fpga and SoC based designs requiring various differential clock formats that also comply with the PCIe standard. The PCIe interconnect standard has been widely adopted in consumer electronics, blade servers, storage, embedded computing, IP gateways and industrial systems. The PCIe interface is also supported in fpga and SoC devices, providing designers with solutions for transferring data within systems. "By applying our 'one stop shop' timing IC supplier model to the PCIe market, we're providing customers with the utmost flexibility in choosing the right clocking solutions for their PCIe application needs," said Mike Petrowski, general manager of Silicon Labs' timing products. "Our expanded PCIe timing solution portfolio gives developers a full complement of off the shelf options for minimising power, enhancing signal integrity and reducing cost, as well as the industry's most customisable clock generators and buffers for fpga based designs." The Si5214x clock generator and Si5315x clock buffer families consist of two to nine output timing devices that, according to Silicon Labs, offer the industry's highest level of performance per watt - twice as power efficient as competing clocking solutions. Lower power helps minimise heat dissipation and reduces the need for additional cooling components and power regulators. The devices meet PCIe jitter requirements with up to 50% margin, leading to better system reliability and enhanced bit error rate performance. The devices use output buffer technology to integrate all external termination resistors and, said to be the smallest PCIe clocking devices on the market, the new clock generators and buffers are suitable for space constrained applications. Silicon Labs describes the Si5335 clock generator/buffer IC as the industry's easiest to customise clocking solution for addressing complex timing challenges in PCIe- and fpga based applications. Any combination of up to four output frequencies ranging from 1 to 350MHz can be configured on its outputs, while up to three unique device configurations can be specified for a single part number. This enables the it to replace three separate clock generators or buffers and allowing developers to reuse a custom Si5335 device across multiple designs. The Si5335 clock generator/buffer IC features up to five user assignable control pins to simplify PCIe and fpga based system design and streamline emi compliance with its PCIe compliant spread spectrum clocking option. The device features Silicon Labs' patented MultiSynth fractional divider technology, which enables any frequency synthesis on every output clock with sub picosecond jitter. The Si5335 exceeds the performance requirements of PCIe, Ethernet and mass storage industry standards. Its 0.45 ps maximum (rms) jitter is more than twice as low as the PCIe 3.0 jitter requirement (1 ps). According to Silicon Labs, the Si5335 simplifies multichip clocking challenges by supporting any combination of differential formats such as LVPECL, LVDS and CML and single ended formats like LVCMOS. Eliminating the need for multiple clock generators and/or buffers, the device's outputs support any combination of four differential outputs or up to eight LVCMOS outputs. This output format flexibility makes it easy for designers to accommodate the widely varying output signal formats and power supply voltages common in PCIe, fpga and SoC based embedded systems.