Infineon architecture targets automotive applications

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Infineon Technologies has announced a new 32bit mcu multicore architecture designed to address the requirements of next generation automotive powertrain and safety applications.

According to Infineon, it features up to three processor cores, introduces lockstep cores and contains enhanced hardware safety mechanisms. Based on the company's existing TriCore processor, Infineon claims the new architecture sets a benchmark for real time performance in automotive applications. The three TriCore processor cores are connected over a crossbar running at the full cpu speed and avoiding hardware contentions. It implements multiple program Flash modules with independent read interfaces designed to further support the real time capability. Additional features include a new timer module which offloads the cpus and new a/d converters including Delta Sigma. The 65nm embedded Flash silicon process technology and the microcontroller architecture are designed to balance increased performance with the need for lower power consumption. Additional low power modes are supported. Two of the three TriCore cpus feature additional Lockstep cores which can be independently configured, while a distributed memory protection system operates on core level, bus level and on peripheral level. According to Infineon, these enhanced encapsulation techniques allow the integration of software with mixed criticality levels from different sources. The multicore architecture features a hardware security module that uses Infineon's hardware-based security technology. The 65nm embedded Flash technology is designed for harsh automotive environments and end of line programming speed of the embedded Flash is up to 20 times faster than in Infineon's previous generation of microcontrollers. The first implementation of the multicore architecture, the Development Device contains three TriCore cpus, two of them with lockstep implementation, and 4MByte of embedded Flash. The multicore architecture will be used in the next generation 65nm eFlash microcontroller family AURIX. The range will be scalable with devices of up to 300MHz in clock frequency and up to 8MB of embedded Flash. Potential applications include the control of combustion engines, electrical and hybrid vehicles, transmission control units, chassis domains, braking systems, electrical power steering systems, airbags and advanced driver assistance systems. First products of the AURIX family are scheduled to be available by mid 2012, with qualification planned in the second half of 2013.