IMEC widens material search for further scaling

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Imec has told the 2012 VLSI Technology Symposium that it is successfully testing and evaluating various options for further transistor scaling using high k dielectrics and metal gates in a replacement metal gate (RMG) integration schema.

The Belgian research institute said that, although RMG technology is inherently more complex than gate first integration, it has a number of advantages that not only increase device performance, but which also widens the choice of high k and metal gate materials. Imec and its partners say they have played an important role in the introduction of high-k metal gate processes. Now, with the eye on scaling beyond 20nm, researchers are evaluating RMG technology for different applications, looking at integration options, materials selection and engineering, as well as compatibility with advanced modules and device architectures. One of the challenges for device scaling is the choice of gate dielectric and gate electrode. Key gate electrode parameters include work function, resistivity and compatibility with cmos technology. Further scaling also requires channel mobility to be improved, adding options for improved stress management and reliability control as first order considerations in the choice of materials and processes. In the RMG approach, the high-k gate dielectric is deposited at the beginning of the flow or just prior to gate electrode deposition, while the gate electrode is deposited after the formation of the junctions. This is said to enhance channel stress in shorter devices because of the dummy gate removal. RMG also allows metal gate processes with a lower thermal budget, which broadens the range of material options for work-function tuning and reliability control. Additional advantages include a lower gate resistance compared to gate-first and more room for mobility improvement. The research is performed in cooperation with Globalfoundries, Intel, Micron, Panasonic, Samsung, TSMC, Elpida, SK Hynix, Fujitsu and Sony.