Chip combines computing and data storage in 3D

1 min read

A chip has been built by researchers at Stanford University and MIT which is said to use multiple nanotechnologies, together with a new computer architecture, to process massive volumes of data.

The researchers claim the connections between chips for computing and chips for data storage are limited, which is creating a communication bottleneck.

To solve this issue, the researchers created a chip using carbon nanotubes and resistive RAM cells.

The RRAM and carbon nanotubes are built vertically over one another, making a dense 3D computer architecture with interleaving layers of logic and memory.

According to the research team, carbon nanotube circuits and RRAM memory can be fabricated at much lower temperatures than conventional silicon transistors - less than 200°C. “This means they can be built up in layers without harming the circuits beneath,” MIT assistant professor Max Shulaker explained.

The researchers claim logic made from carbon nanotubes is more energy efficient and that RRAM is denser, faster, and more energy-efficient than DRAM.

“The 3D computer architecture provides dense and fine-grained integration of computating and data storage, drastically overcoming the bottleneck from moving data between chips,” said Stanford Professor Mitra.

“As a result, the chip can store massive amounts of data and perform on-chip processing to transform a data deluge into useful information.”

To demonstrate the potential of the technology, the researchers placed more than 1million carbon nanotube-based sensors on the top layer of the chip, which they used to detect and classify ambient gases.

According to the researchers, due to the layering of sensing, data storage, and computing, the chip could measure each of the sensors in parallel, and then write directly into its memory, generating huge bandwidth.