Presented at last week’s ISSCC in San Francisco, the 60GHz transceiver architecture features direct conversion and analogue baseband beamforming with four antennas. The architecture is said by the partners to be inherently simple and to not be affected by image frequency interference. They add that a 24GHz phase locked loop locks subharmonically to a 60GHz quadrature oscillator and is ‘inherently immune’ to the pulling disturbance of the 60GHz power amplifier.
The prototype chip, which occupies 7.9mm2, was validated using a IEEE 802.11ad standard wireless link of 1m. The transmitter consumes 670mW and the receiver 431mW when using a 0.9V power supply. The transmitter-to-receiver error vector magnitude is said to be better than -20dB in the four WiGig frequency channels (58.32, 60.48, 62.64 and 64.8GHz), with a transmitter equivalent isotropic radiated power of 24dBm. This performance is said to support QPSK, as well as 16QAM modulations, and data rates of up to 4.62Gbit/s.
