Will 2.5D technology be the move which sparks further growth in demand for fpgas?

FPGAs are built on leading edge processes; they are often one of the first devices to run on the new lines. Early yields of large devices can be disappointing from the manufacturer's perspective, so they are left until the process has 'bedded in' and yields have reached acceptable levels. But that approach raises different problems: fpga users often want access to the largest members of a new family, but have to wait. Last year, Xilinx announced its solution to the dilemma; the use of stacked silicon interconnect technology – which it calls a 2.5D approach – to effectively 'stitch' four smaller fpgas together in order to give the capacity which developers need. Now, the company has started shipping the Virtex-7 2000T, which it claims not only features twice as many transistors as the previous largest such part, but is also the largest ic yet built. In total, the fpga includes 6.8billion transistors, which equates to 2million logic cells and 20m asic gates. Ivo Bolsens, Xilinx' chief technology officer, said: "We started shipping 2000Ts in September. Having looked at the reliability and test issues, we are confident the technology is ready for mainstream deployment." One of the reasons Bolsens puts forward for the interest being shown in the 2000T is its performance. "It delivers more capacity, more performance, more bandwidth than any other fpga, but with better power efficiency. This technology has allowed Xilinx to make a difference that goes beyond percentage improvements on figures of merit." The reason why stacked silicon interconnect is successful, Bolsens noted, is because of Xilinx' ASMBL (advanced silicon modular block) architecture. "We had this application in mind when we developed the concept. It allows us to take advantage of through silicon vias. And the interposer on which the four fpga dice sits acts as a stress reliever." Bolsens believes that stacked silicon interconnect technology could be the one thing which breaks the programmable logic market out of its long term stagnation. For the last few years, programmable logic sales have been no more than $4bn a year, despite the industry's belief that fpgas would penetrate other markets. "This development will excite growth in the semiconductor market," Bolsens claimed. He thinks this will happen because the technology will create new opportunities and pointed to three potential markets. "ASIC and assp replacement is one," he said. "There's a few bastions left and the 2000T can go after high end asics." He added system integration and asic prototyping and emulation as the two other markets. "Integration of homogeneous applications is somewhere people didn't expect fpgas to be," he continued, "and asic prototyping is a 'slam dunk'. I don't see any competition in emulation and prototyping; the 2000T outperforms anything available or being announced." In terms of an asic replacement technology, the 2000T is said by Bolsens to be a strong contender. "I believe this device will allow Xilinx to address many of the remaining asic strongholds," he said. "Wireline telecommunications is one area where companies continue to develop asics because of the complexity required. The 2000T can handle those levels of complexity and offer developers the opportunity to save the huge NRE costs. It's also a fast moving market, where volumes are limited and this plays to the fpga's strengths. So, if fpgas can handle the complexity, they can also suck in some of the functionality seen in the Bill of Materials and allow complete systems to be implemented." He gave an example of where the 2000T might fit. "Xilinx has a networking customer who is building asics for a terabit switch. The design was based on a 20m gate asic consuming 30W and taking two years to develop. What happened was, when the design was frozen, the company ended up with a 20m gate asic, but also two fpgas to deal with changing market requirements. The complete system consumes 70W and has taken three years to develop. It concluded the design could have been implemented in a single 2000T without the need for the other fpgas. Power consumption is 30W and the development time is about a year." Turning to system integration, Bolsen quoted another example. "In this, the customer had a system with two cpus and four fpgas, but wanted an evolutionary platform with scalable performance. But partitioning the system over multiple chips delayed the development. By mapping the system into a 2000T, the customer has removed the I/O bottleneck and developed a solution which offers five times the performance and consumes around 15% of the power. It also cut design time by 75%." In a demonstration of the device's abilities, Xilinx has implemented 3600 8bit processing elements in a 2000T; a design that takes up 84% of the part's logic. When all elements are running at full power, the device is said to consume just 19W while offering a processing power of 180,000MIPs. But another use is simply reducing the number of fpgas in a system. "The largest fpga from our nearest competitor has 980,000 logic elements; the 2000T has 2m. Putting four competitor's fpgas together gives 1.2TMACs; the 2000T offers 1.5TMACs. And, when you factor in interconnects, the four fpgas will consume 112W compared to the 19W consumed by the 2000T. The combination of the architecture and removing the I/O bottlenecks brings an order of magnitude better performance per Watt." When used as an asic emulation or prototyping technology, the 2000T is said to bring similar benefits. "Software is an important differentiator in systems," Bolsens pointed out. "But software people don't always start writing until they see hardware. More and more customers are asking for the ability to build prototypes so they can get the software effort underway." ARM is one company which will be adopting the 2000T as part of its system verification process. John Goodenough, the company's vice president for design technology and automation, said: "The device underpins a flexible, yet targeted, emulation architecture and delivers a significant capacity improvement, allowing us to more easily run complete system verification and validation for our next generation processors." Looking to the future, Bolsens envisages devices such as the 2000T supporting broader levels of integration. "By using this technology," he concluded, "designers will be able to have single chip integration, with, for example, optics, memory and multicore processors."