An ARM based programmable processor is set to enable new communications products

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The latest communications processor family from Mindspeed Technologies is designed around the ARM Cortex-A9 core, bringing improved performance over the previous generation.

The Comcerto 2000 family is targeted at control tasks and, alongside the bolstered processing performance provided by the ARM Cortex-A9 core, Mindspeed has also incorporated a dozen micro engines, including packet processing acceleration hardware technology, referred to by the company as open packet acceleration logic (OPAL). Such offload hardware, which is missing from Mindspeed's existing C1000 family, enhances the abilities of the company's communication processors to tackle control and data plane processing tasks. "Our goal [by adding offload] is to give as many cycles on the processor to the customer, to add value and services on top and to not get bogged down by the networking tasks," said Preetinder Virk, senior vice president and general manager of Mindspeed's communications convergence processing unit. The Comcerto 2000 devices are aimed at applications such as gateways, internet protocol (IP) routers, security platforms, wireless access, network attached storage and Voice over IP (VoIP) applications for homes and enterprises. Mindspeed is well established in the broadband home gateway market a market which the C1000 has already addressed and a market for which many of the early design wins for the C2000 – with its enhanced processing and code compatibility – are targeted. But the C2000 is also opening new market opportunities for Mindspeed, including the small to medium business router market, consumer network attached storage and wireless access points. "The advent of the [wireless LAN] IEEE 802.11ac and .11n concurrent requires lots of MIPs and low power consumption and the C2000 is well suited to that type of application," said Marco Bello, executive director of marketing and product management, customer premises equipment at Mindspeed. Two family members – the single core Comcerto C2100 and the dual core C2200 – have been announced initially and are available as samples. The C2200 comes in three clock speeds: 650MHz, 900MHz and 1.2GHz, while the C2100 is clocked at 900MHz, with a 1.2GHz version planned. The Comcerto 2000 family supports asymmetric and symmetric multiprocessing modes. Using symmetric multiprocessing, software runs on the C2200's two cores, doubling the processing resources while appearing as one set of processing and one set of internal cache. "It gives the software engineer an ability to work at a more abstract level on the device without having to worry about how to manage the internal resources," said Virk. The symmetric multiprocessing mode is of particular benefit for code that is not inherently parallel, such as control and management tasks. The ARM core used in the devices includes the Neon dsp, a general purpose single instruction, multiple data (SIMD) unit. Neon is used to tackle such digital signal processing tasks as VoIP call echo cancellation and high definition voice, as well as video and graphics processing. "We can cut down the bill of materials [using Neon] by avoiding having to use an external dsp," said Virk. Comcerto 2000 comes with a range of interfaces, including three gigabit Ethernet ports. For broadband access applications, such as passive optical networking (pon) customer premise equipment, two of the gigabit interfaces can be used for the uplink and downlink interfaces; the third provides users with a redundant back up uplink interface. Other interfaces include two SATA 2 serial attached storage interfaces, two PCI Generation 2 interfaces and USB 2.0 and USB 3.0 interfaces. However, the most significant architectural addition to the Comcerto 2000 family is the offload engines. One main task performed by these engines is packet processing; making decisions as to what to do with input packets and managing the traffic as it is sent on. The device can process up to 2Gbit/s, each packet 64byte long – the most demanding case. The micro engines are programmable. For example, a particular quality of service (QoS) can be programmed based on a customer's need to differentiate its traffic. The QoS and traffic management supported is also compliant with the Home Gateway Initiative 2.0 standard, said Mindspeed. Certain of the devices' micro engines have been left idle deliberately to enable custom protocol processing. One example Mindspeed cites is the use of custom header protocols for communication between line cards across a platform's backplane. "You might put in a custom header regarding the QoS or the type of payload or type of encryption," said Virk. "All the networking tasks get offloaded," he continued. "Not just the packet forwarding, QoS and the traffic management, but also security and encryption; even the VoIP tasks are offloaded and, if you have DECT, that processing is also offloaded." There is also an engine for offloading the processing of the TCP/IP stack for network attached storage. One offload engine oversees the device's power management. Its role is to be always on, even when the main device logic blocks are powered down. Once activity is detected, the unit wakes up the required hardware blocks in the correct sequence. The micro engines are programmed using the 'C' language. "If you know 'C' and the networking protocol, you are 'good to go'," said Virk. A state machine oversees the OPAL units. "When packets arrive at the processor, certain things happen and, based on the sequence, different micro engines get activated to do their job," said Virk. Each micro engine also has its own memory. Having OPAL means Comcerto 2000 processors support the important emerging networking development known as software defined networking (SDN). Google has already embraced SDN in its network and the development is also proving of interest to traditional telecom service providers. A key principle underpinning SDN is the separation of the data and control planes to enable more centralised and simplified management of the network. The Openflow open standard is one implementation of SDN being developed by the Open Networking Foundation – an industry body that includes Google, Facebook and Microsoft, along with telecom operators such as Verizon, NTT and Deutsche Telekom, and various equipment makers. "The reason why the likes of Google, Amazon and certain operators are keen on SDN is that it opens up much more flexibility for a network operator to separate the services they care about – the policies, the management, the routing algorithms – from the physical equipment," said Rupert Baines, Mindspeed's vice president of corporate strategy and marketing communications. This is done using middleware and an application programming interface that allows the software to talk to and control the underlying networking hardware, typically networking switches. "What makes SDN relevant for Mindspeed is that our micro engines are programmable," said Baines. "Because of that, we can do the hardware acceleration that handles packets through a standardised mechanism so that protocols like Openflow can sit on top of the 'C' layer and it becomes hardware neutral." Mindspeed says that it is too early to talk about the Comcerto 2000 being used in particular SDN compliant products. "It is at a stage before that," said Baines. "But nearly all of our customers are asking about this, most have projects going on, and it is very high on people's care about list."