The “Development Of Cryogenic CMOS To Enable The Next Generation Of Scalable Quantum Computers” project has seen consortium members create cryogenic SPICE models for the GF 22FDX process technology, and sureCore had used these to recharacterize standard cell and IO cell libraries, as well as developing low power SRAM, ROM and Register File Compilers.
These cryogenic IP libraries are being used to enable the development of a test chip that will allow measurement of performance at cryogenic temperatures. Agile Analog is working closely with sureCore to implement and verify its solution.
According to Barry Paterson, CEO of Agile Analog, “sureCore approached us to undertake the physical design required to create a test chip for this cutting-edge project. Integrating control and measurement electronics capable of operation down to 4 Kelvin is critical to enabling quantum computer scaling. The UK is leading innovation in the quantum technology space, and I am pleased that Agile Analog can participate in the development of this technology.”
As part of the physical design Agile Analog completed the synthesis, floor planning, place and route, and design closure steps to ensure that the cryogenic test chip would be able to act as a qualification test vehicle, in order to prove that the approach adopted by this project could be a viable solution for cryogenic control ASICs.
Semiconductor process technologies are typically characterized for operation from -40C to 125C. However, in the world of quantum computing, where operational qubits require temperatures even lower than 4K, co-locating the control electronics close to the qubits within the cryostat is crucial for quantum computer scaling.
There is also a need to dramatically increase the number of qubits, from the several hundred that is possible today to millions.
These qubits have to be controlled, and currently this is done by using external control electronics housed outside of the cryostat at room temperature. By generating semiconductor IP that can operate at cryogenic temperatures, quantum computing developers can quickly design their own control ASICs that can be co-located with the qubits in the cryostat.
Paterson concluded, “We have gained invaluable experience in working at challenging temperatures. The pathway to advanced quantum computers with millions of qubits relies on integrating the control and measurement within the cryostat. We can use the knowledge acquired during this project to make a range of our analogue IP, including our data converters, available with support for these cryogenic temperatures. We are already having initial discussions with potential partners about delivering these solutions.”