comment on this article

Anritsu and Synopsys demonstrate PCIe test system at DesignCon

Anritsu and Synopsys are jointly demonstrating the PCI Express (PCIe) 5.0 Rx LEQ Test System supporting compliance test items using Anritsu’s Signal Quality Analyzer-R MP1900A series PCI Express 5.0 test system and Synopsys’ DesignWare IP for PCIe.

The live demonstrations will be conducted in the Anritsu DesignCon booth, #837 at DesignCon 2020 in Santa Clara, over the next three days (January 28-30).

With high-speed data rates of 32 GT/s, PCIe 5.0 requires new measurements, such as complex link training and crosstalk tests. With high-quality signals supporting 32G, the MP1900A PCIe solution improves the efficiency of link training tests by monitoring/logging Link Training and Status State Machine (LTSSM) transitions and generating event triggers for waveform capture.

Multichannel expandability for crosstalk tests and easy expandability from PCIe 4.0 (16 GT/s data rates) to PCIe 5.0 (32 GT/s data rates) support early implementation of PCIe 5.0 products.

The joint DesignCon 2020 exhibit will demonstrate stress signal generation using the MP1900A BERT and a PCIe 5.0 compliance board. It will also conduct actual link training of a system incorporating the Synopsys DesignWare IP for PCIe 5.0 and Anritsu MP1900A PCIe 5.0 Link Training Software to evaluate receiver stressed input characteristics.

Author
Elliot Mulley-Goodbarne

Comment on this article


This material is protected by MA Business copyright See Terms and Conditions. One-off usage is permitted but bulk copying is not. For multiple copies contact the sales team.

What you think about this article:


Add your comments

Name
 
Email
 
Comments
 

Your comments/feedback may be edited prior to publishing. Not all entries will be published.
Please view our Terms and Conditions before leaving a comment.

Related Articles