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Mixing it up

Conquering the challenges of mixed signal verification. By Dr Christopher Brown.

The verification of mixed signal designs shares all the issues associated with verifying digital designs, for example, detecting complex corner case bugs. However, there are two extra problems; (1) the need to verify a transistor model of the design as well as an hdl model and (2) the fact that analogue simulators are many orders of magnitude slower than hdl simulators.

A common approach to (1) is to manually insert delays into hdl models so that the hdl model matches exactly the delay of the transistor model at nominal process conditions. The waveforms from simulations of both models can be compared thus exposing any differences between the two implementations.

This technique avoids writing two test benches; one for each level of modelling abstraction. However, this approach usually results in lengthy manual tuning of test cases and delays, as well as deciding on valid time windows for comparison. By its nature this tuning takes place at the end of the project thus incurring an unpredictable day for day slip in project completion. The usual approach to (2) is to write a small number of dedicated test cases targeted at particular features with no objective coverage measurement.

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Author
Graham Pitcher

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