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Weebit scale ReRAM to 28nm

Weebit Nano and its development partner CEA-Leti, have demonstrated production-level parameters of Weebit’s Resistive Random-Access Memory (ReRAM) technology in a 28nm process.

This demonstration is a key step toward productisation of embedded Non-Volatile Memory (NVM) for applications such as AI, autonomous driving, 5G, and advanced Internet-of-Things (IoT) processors.

Weebit and CEA-Leti, the French research institute, jointly tested, characterised and measured functional 1 Megabit (Mb) ReRAM arrays in a 28nm process technology on 300mm wafers, the largest diameter used in mass production and the standard in advanced nodes.

The 28nm ReRAM arrays are implemented using a small and power-efficient switching device, taking full advantage of the low power and low voltage capabilities of the 28nm process, and enabling an up to 4 times increase in memory density. Testing of Weebit’s one-transistor-one-resistor (1T1R) ReRAM arrays, embedded in 28nm Fully Depleted Silicon on Insulator (FDSOI), was able to prove its robustness with very good endurance and data retention alongside other production-level quality parameters.

This successful demonstration of reliability and robustness at 28nm is seen as strongly positioning Weebit’s ReRAM technology as a key memory technology in NVM for advanced processes where it is no longer technically or economically feasible to embed flash memory technology.

Commenting Weebit, CEO Coby Hanoch said, “Weebit, through its close partnership with CEA-Leti, has already demonstrated the significant advantages of its ReRAM technology at larger geometries, and we have now shown that we can successfully scale this technology down to 28nm. Mark Liu, Chairman of TSMC, the world’s largest fab, recently called 28nm ‘the sweet spot for our embedded memory applications’ since the 28nm geometry is widely deployed in a range of applications and is considered the gateway to the most advanced process nodes."

Author
Neil Tyler

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