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UltraSoC extends on-chip analytics architecture

UltraSoC has significantly extended its embedded analytics architecture, allowing designers and innovators to incorporate powerful data-driven features into their products.

Developers in the automotive, storage and high performance computing industries will now be able to integrate more sophisticated hardware-based security, safety and performance tuning capabilities within their products using UltraSoC's in the system on chip (SoC) development cycle.

New features allow SoC designers to build on-chip monitoring and analytics systems with up to 65,000 elements, allowing seamless support for systems with many thousands of processors. Future iterations will allow even higher numbers of processors for Exascale systems. In addition to this improved scaling capability, new System Memory Buffer (SMB) IP allows the embedded analytics infrastructure to handle the high volumes of data generated by multicore systems, and to cope with “bursty” real-world traffic.

The UltraSoC architecture can effectively monitor unlimited numbers of the internal building blocks that make up the most complex SoC products – and to analyse the impact on system-level behaviour of the interactions between them. These heterogeneous multicore chips are becoming increasingly common in enabling the artificial intelligence and machine learning technologies required in leading edge applications such as driverless cars.

Commenting UltraSoC CEO, Rupert Baines, said: “Our solutions are unique in the market in their ability to deal with multiple heterogeneous processors, standard and proprietary bus structures and even custom logic. This dramatic extension of our architecture takes us even further ahead of traditional solutions – both in the debug and development arena, and in allowing our customers to incorporate in-life monitoring capabilities to ensure security, functional safety and real-world performance optimisation.”

UltraSoC’s system-level monitoring and analytics capabilities extend beyond the chip’s core processing components to all parts of the system – which may include thousands of IP blocks and subsystems, buses, interconnects and software.

The new features within the UltraSoC architecture allow chip designers to deploy tens of thousands of monitoring and analytics modules within a single infrastructure. By providing an integrated, coherent analysis of the behaviour of the system, UltraSoC said that it had significantly reduced the development burden for next-generation machine learning and artificial intelligence applications, as well as allowing the implementation of innovative product features such as hardware-based security and functional safety.

Extension of the UltraSoC architecture to encompass effectively unlimited monitoring capabilities helps developers to address the problems of systemic complexity which are among the most pressing issues faced by the electronics industry today.

The complex interactions between multiple hardware blocks, firmware and software within SoCs have already made real-time in-life monitoring an indispensable tool for SoC designers. Changes in design approaches are also making system-wide monitoring more necessary than ever. Agile software development and ad hoc programming practices inherently require high-granularity visibility of the real system. Similarly, system hardware and software may not be ‘architected’ in the traditional sense: again, engineers need clear visibility of the run-time behaviour of their systems.

The new UltraSoC analytics and monitoring architecture will be readily configurable within UltraSoC’s UltraDevelop2, the company’s new IDE (Integrated Development Environment), unveiled recently and which is due to be to be rolled out from Q1, 2019.

Neil Tyler

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